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Intel Infuses Nios Soft Processors with RISC-V Instruction Set

Making RISCy moves

by thenewz
intel infuses nios soft processors with risc-v instruction set

Intel updated its lineup of the famous Nios soft processors with the latest Nios V softcore, designed around the open-source RISC-V instruction set architecture.

The Nios family of processors is Intel’s implementation of simple low-power processors designed to fit inside Field Programmable Gate Array (FPGA) designs and occupy just a tiny portion of it, supplying basic CPU functionality. According to Gartner, the Nios CPU family is the most widely-used softcore tech in the FPGA industry. These soft cores allow FPGA designs to have the basic functionality that the design would require from a CPU. This way, the company provides hardware designers with basic CPU needs with their Intel FPGAs, enabling faster hardware development.

The industry is becoming more interested in the open RISC-V ISA, and according to recent reports, Intel has also expressed interest in purchasing RISC-V startup SiFive for $2 billion. That makes plenty of sense given the wide range of applications that RISC-V can satisfy, just as we see with the Nios V soft cores.

The importance of using RISC-V as an ISA template for these types of cores lies with the open-source hardware initiative that aims to open the whole ecosystem, making it accessible to anyone.

The Nios II, a predecessor of Nios V, is Intel’s 32-bit digital signal processing (DSP) and system control based on reduced instruction set computer (RISC) design principles. The Nios II iteration is a 32-bit RISC CPU with 32 general-purpose 32-bit registers, a complete 32-bit instruction set, data path, address space, and single-instruction 32 × 32 multiply and divide, producing a 32-bit result. While we don’t know the details of Nios V, we assume it is very similar.

For now, the Nios V is a microcontroller in the V/m form. This design uses the RV32IA part of the RISC-V specification with atomic extensions, a 5-stage pipeline, and AXI4 interfaces, creating a capable microcontroller design. However, Intel plans to continue engineering Nios V design IPs and develop a Linux-capable V/g general-purpose Nios V form of processor capable of running Linux kernel.

The introduction of Nios V means that Intel is finally jumping on the RISC-V open-source bandwagon. The company already offers some of the first designs based on the open ISA, and in the future, we could see more powerful designs emerge from Intel’s design centers.

Source: tomshardware

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